1. Field of the Invention
The disclosure generally relates to a memory device, and more particularly, to a memory device comprising a column decoder for reducing the capacitive coupling effect on adjacent memory cells.
2. Description of the Related Art
FIG. 1 is a diagram for illustrating a conventional memory device 100. As shown in FIG 1, the memory device 100 at least comprises a memory cell array 110 and a column decoder 120. To simplify the diagram, other components of the memory device 100 are omitted and not shown in FIG. 1, The memory cell array 110 comprises a plurality of memory cells. A plurality of word lines WL and a plurality of local bit lines BL are configured to select the memory cells. Furthermore, the column decoder 120 is configured to selectively couple one of the local bit lines BL to a global bit line GBL.
FIG. 2 is a diagram for illustrating a capacitive coupling effect on the conventional memory device 100. As shown in FIG. 2, the memory cell array 110 is implemented with a plurality of memory transistors M1-1 to M3-3 (also known as “memory cells”), With the development of the semiconductor manufacturing process, the size of the memory device 100 is becoming much smaller, and thus the memory transistors M1-1 to M3-3 therein are getting closer to each other. This results in a serious mutual coupling effect due to parasitic capacitances between adjacent elements. For example, when a word line WL2 and a local bit line BL2 are selected, the memory transistors M1-2, M2-2, and M3-2 are enabled, and a current 12 flows through the selected local bit line BL2, the memory transistor M2-2, and a source line VL. Ideally, two adjacent local bit lines BL1 and BL3 should be kept floating and no current is induced from them. Actually, however, unexpected coupling currents I1 and I3 are induced and flow through the memory transistors M1-2 and M3-2 and the unselected local bit lines BL1 and BL3 because of the capacitive coupling effect between the memory transistors M1-2, M2-2, and M3-2, This mutual coupling effect may lead to some operation errors and degrade the reliability of the memory device 100.